Staff Silicon Product Engineer

WaymoTaipei (TW-TPE-101) (Hybrid)
ContractHybridPrincipal$5,200,000 - $5,200,000 / YearLimited info disclosed
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Description

<div class=&quot;content-intro&quot;><p>Waymo is an autonomous driving technology company with the mission to be the world&#39;s most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World&#39;s Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states.</p></div><p data-pm-slice=&quot;1 1 []&quot;>Waymo&#39;s Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.</p> <p><em>This role follows a hybrid work schedule and reports to the Director, Silicon.&nbsp;</em></p> <p><strong>You will:</strong></p> <ul> <li> <p>Lead Custom Silicon Productization: Drive advanced ASICs and domain-specific architectures (TPU, ISP, AI/ML compute) for the Waymo Driver from first-silicon bring-up through characterization and high-volume production ramp.</p> </li> <li> <p>Define System-Level Test (SLT) Content &amp; Hardware Strategy: Develop targeted test workloads, stress conditions, and pass/fail criteria and the define and architect the production screening hardware to rigorously screen marginal silicon and system interactions.</p> </li> <li> <p>Lead RMA &amp; Field Failure Investigations: Drive comprehensive root-cause analysis for field returns and RMAs by correlating failure signatures with system telemetry, manufacturing history, and lab data to continuously improve ASIC reliability and close screening and validation gaps.</p> </li> <li> <p>Execute Hands-On Debug &amp; Production Readiness: Perform hands-on silicon debug using lab equipment, system logs, firmware/software traces, and schematics to develop product operating limits, guard bands, binning strategies, and screening criteria based on characterization results.</p> </li> <li> <p>Optimize Yield &amp; Product Health: Develop large-scale data mining and statistical analysis to identify failure signatures and yield limiters, translating hardware insights into actionable design feedback and scalable screening improvements.</p> </li> <li> <p>Silicon Bring-Up and Product Characterization: Partner closely with architecture, validation, platform, operations, and supplier teams to correlate lab, manufacturing, and system telemetry data, and root-cause silicon and system-level issues.</p> </li> </ul> <p><strong>You have:</strong></p> <ul> <li> <p>Master’s degree or PhD &nbsp;in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a related technical discipline.</p> </li> <li> <p>10+ years of experience in product engineering, silicon bring-up, silicon characterization, yield debug, system validation, failure analysis, or productization of SoC, ASIC, or other complex semiconductor products, including hands-on experience bringing up and characterizing complex silicon products from engineering samples through production release.</p> </li> <li> <p>Experience defining or deploying system-level test, platform-level validation, production screening, or workload-based stress testing; Experience with yield analysis, failure signature analysis, margin analysis, guardbanding, correlation analysis, RMA analysis, or production-quality improvement.</p> </li> <li> <p>Experience debugging silicon or system-level failures using characterization data, system logs, lab measurements, firmware/software traces, schematics, and manufacturing data; Ability to read and interpret schematics, silicon specifications, characterization reports, system logs, and production data.</p> </li> <li> <p>Proficiency with Python, SQL, JMP, R, MATLAB, or equivalent tools for data analysis, automation, visualization, and debug.</p> </li> </ul> <p><strong>We prefer:</strong></p> <ul> <li> <p>Experience with AI/ML accelerators, TPUs, GPUs, NPUs, ISPs, high-performance SoCs, automotive silicon, or domain-specific architectures.</p> </li> <li> <p>Experience debugging interactions across silicon, board, firmware, driver, operating system, workload, and application layers including with OS kernel, drivers, BIOS, firmware, boot flows, telemetry, diagnostics, or low-level software debug.</p> </li> <li> <p>Strong knowledge of PCIe, Ethernet, MIPI, high-speed interfaces, power delivery, clocking, reset, thermal behavior, or system performance optimization.</p> </li> <li> <p>Experience working with foundries, OSATs, contract manufacturers, reliability labs, and external suppliers.</p> </li> <li> <p>Experience applying machine learning, LLMs, RAG, agent frameworks, or advanced analytics to automate silicon characterization, yield debug, system log analysis, or production health monitoring.<br>Self-motivated and results-oriented, with strong ownership of technical deliverables in a fast-paced development environment; Excellent written and verbal communication skills, with the ability to explain complex technical issues to cross-functional teams and leadership.</p> </li> </ul> <p><strong>Travel requirements</strong>:</p> <ul> <li>Approximately 10% travel, Vendor sites in Taiwan, Bring-up Activities in California</li> </ul> <p>&nbsp;</p><div class=&quot;content-pay-transparency&quot;><div class=&quot;pay-input&quot;><div class=&quot;description&quot;><p><span style=&quot;font-weight: 400;&quot;>The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level.&nbsp; Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. </span></p></div><div class=&quot;title&quot;>Salary Range</div><div class=&quot;pay-range&quot;><span>$5,200,000</span><span class=&quot;divider&quot;>&mdash;</span><span>$6,000,000 TWD</span></div></div></div>