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Staff Software Engineer, New Products
Full TimeOn-sitePrincipal
rarchitectureprototypingtiktokr

About Airwallex Airwallex is the AI-native financial operating system for a real-time, intelligent economy. More than 675,000 businesses, including McLaren Racing, Qantas, SHEIN, and TikTok, use us, directly or through our platform partners, to run their financial operations or build and monetize financial products of their own. We started in Melbourne in 2015 to build the infrastructure global commerce runs on. We're the regulated backbone behind global payments: not by accident, but by design. A decade plus, 85+ licenses, and a financial infrastructure spanning North America, Europe, the Middle East, and Asia-Pacific. We're co-headquartered in San Francisco and Singapore, with more than 2,700 people across 27 offices. We hire builders with founder-level energy, people who move fast with good judgment, dig in with real curiosity, and make calls from first principles rather than waiting to be told what to do. Read our operating principles to see it in full. How you'll make impact The Founders' Lab turns ambitious, high-level concepts into functional software and new product lines. You'll work across product and engineering to validate ideas quickly, build practical solutions, and establish the foundations for products that can scale within Airwallex. Partner directly with the CEO and global leadership to translate strategic visions and emerging AI capabilities into functional, market-ready software. Lead the technical evaluation and implementation of fintech AI technologies and intelligent workflows, identifying how they can best serve Airwallex's financial platform. Make pragmatic architectural decisions by prototyping quickly to validate ideas, then structuring successful solutions so they can be handed off and scaled. Own delivery across the stack, steering backend architecture and systems design while building complete solutions from data models through to user interfaces. Establish the technical foundations for successful incubation projects and help transition them into standalone product lines within Airwallex. You'll work from our London office with a hybrid working model. What we're looking for Essentials 10+ years of software engineering experience, including operating at Staff level or leading technical direction in greenfield environments. Strong product sense: you look at engineering through a commercial lens and care about user experience, business impact, and why a product is being built—not just the code itself. Comfort with ambiguity: you enjoy working where requirements aren't fully defined and can independently map technical specifications from high-level direction. A pragmatic, resourceful, and self-directed approach to solving problems and working through technical or institutional blockers. Deep backend and full-stack capabilities, with solid fundamentals in high-performance backend ecosystems and the practical ability to build frontend interfaces when moving quickly. Clear communication skills, with the ability to discuss deep technical trade-offs with core infrastructure teams and present simplified product outcomes to executive stakeholders. Preferred Experience building software that leverages Generative AI, LLMs, or automated agent workflows. Experience in fintech, payments, multi-currency ledgering, or regulated financial systems. Prior experience as a founding engineer, technical lead of an R&D team, or technical co-founder. You'll thrive here if You're comfortable owning the roadmap yourself. You own the outcome and you don't wait for permission to fix what's broken. You're comfortable making decisions with incomplete information and moving quickly anyway. You're comfortable with ambiguity. Give you a problem, not a prescription, and you'll run with it. You default to action. You'd rather course-correct in motion than wait for perfect clarity. Applicant Safety Policy: Fraud and Third-Party Recruiters To protect you from recruitment scams, please be aware that Airwallex will not ask for bank details, sensitive ID numbers (i.e. passport), or any form of payment during the application or interview process. All official communication will come from an @ airwallex.com email address. Please apply only through careers.airwallex.com or our official LinkedIn page. Airwallex does not accept unsolicited resumes from search firms/recruiters. Airwallex will not pay any fees to search firms/recruiters if a candidate is submitted by a search firm/recruiter unless an agreement has been entered into with respect to specific open position(s). Search firms/recruiters submitting resumes to Airwallex on an unsolicited basis shall be deemed to accept this condition, regardless of any other provision to the contrary. Equal opportunity Airwallex is proud to be an equal opportunity employer. We value diversity and anyone seeking employment at Airwallex is considered based on merit, qualifications, competence and talent. We don't regard color, religion, race, national origin, sexual orientation, ancestry, citizenship, sex, marital or family status, disability, gender, or any other legally protected status when making our hiring decisions. If you have a disability or special need that requires accommodation, please let us know. Compensation: £95,796 – £177,907 • Offers Equity • Offers Bonus • Base Salary £95,796 – £177,907 • Offers Equity • Offers Bonus Find more English Speaking Jobs in United Kingdom on Arbeitnow

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Senior Verification Engineer
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteSenior
pythongodentalverilogarchitectureinsurance+2

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. Our ideal candidate could have 6+ years' experience. This is a unique opportunity to accelerate your development, working with an experienced and collaborative team and gaining exposure to a broad range of disciplines. At Fractile, we value ideas from everyone, regardless of title or tenure, and we believe the best engineering happens when people share, question, and learn together. You'll be joining a culture where your curiosity is encouraged, your input matters, and there's real room to grow. As a Silicon Verification Engineer, you will be based in either our Bristol or London office in the UK. We are looking for you to take an active role in building world-class ML/AI IC products for scale-out to data centre applications. You will be ambitious and have a proven track record in working in high-performance delivery organisations in the discipline of pre-silicon RTL verification. We are looking for someone who is passionate about verification – not someone content to go through the motions, but rather looking to push the field further forwards. If you get excited about bringing software concepts to hardware workflows, and enjoy improving established practices to increase tape-out quality and bring down costs, then this is the role for you. Our preferred candidate will be comfortable working alongside colleagues across the organisation from disciplines such as modelling, system architecture and RTL design. You'll be frequently collaborating to ensure our RTL releases are of the highest functional quality, and that the entire company shares the same definition of a functionally correct product. This means contributing to discussions around specification, architecture and the workflows surrounding them. You'll be a key contributor to our highly disruptive and ambitious product. We look for engineers with the following mindset: Software mindset for solving hardware problems The desire to be in a high impact role in a small team A disrupter of the "status quo" of hardware development Eagerness to contribute to and improve working practices and help build connections between hardware and software teams Detail-focused, with rigour as the baseline for all work Humility, desire to learn Happy to be part of a fast-paced, open and collaborative environment Required skills and experience: Strong software skills Python (or another object oriented language e.g C++) Understanding of digital hardware concepts Ability to read and debug RTL in SystemVerilog Familiarity with debugging waveforms Candidates with a UVM or a strong software background are encouraged to apply even without an RTL background Desirable skills and experience: Pre-silicon RTL verification Verification planning and execution from specification Building testbenches Stimulus creation Functional modelling of hardware blocks Checker creation Coverage definition/closure Transaction-Level Modelling Whether in UVM, SystemC or another methodology SystemVerilog Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Working in a monorepo environment alongside software Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions How we work Ownership and execution: you will have full agency to drive your work forward Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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Senior/Principal Physical Design Engineer
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteMid
pythonperldentalelectrical engineeringarchitectureinsurance+4

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. We are seeking a highly skilled Senior/Principal Physical Design Engineer to contribute to our next-generation chip designs. As a Physical Design Engineer, you will be responsible for the end-to-end implementation of complex IC physical designs, from synthesis to sign-off, including opportunities for full-chip ownership. You will collaborate with cross-functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities: Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off, with potential responsibility for full-chip execution. Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. Perform power planning and analysis, addressing IR drop, electromigration, and low-power design techniques. Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance. Collaborate with DFT engineers to integrate design-for-test (DFT) structures into the physical implementation. Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others. Interface with foundries and process engineers to ensure manufacturability and yield optimisation. Work closely with RTL and architecture teams to drive design feasibility, constraints, and physical-aware RTL design. Work with advanced AI tools and models to improve productivity, analysis, and design quality. Preferred Qualifications: Bachelor' Master's or PhD in Electrical Engineering, Computer Engineering, or a related field. 8+ years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below). Strong proficiency in EDA tools for place & route, STA, and sign-off. Solid understanding of CMOS technology, semiconductor physics, and process limitations. Experience with low-power design methodologies, power optimisation techniques, and multi-power domain architectures. Expertise in timing closure, signal integrity, IR drop analysis, and formal verification. Proficiency in scripting languages like TCL, Perl, or Python for automation. Excellent problem-solving skills, communication, and teamwork in a collaborative design environment. Experience in high-performance computing (HPC), AI accelerators, or networking chips. Experience or strong interest in leveraging advanced AI tools and models within engineering workflow What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find more English Speaking Jobs in United Kingdom on Arbeitnow

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Product & Yield Engineer (Data-focused)
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteMid
pythonsqldentalmanufacturingquality controlinsurance+4

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. We are looking for an Engineer to play a key role in the development and manufacture of Fractile's silicon products, with a particular focus on product, yield and manufacturing data analysis. Working across New Product Introduction (NPI), Yield Engineering and Product Quality, you will analyse large and complex semiconductor datasets to identify trends, isolate sources of variation, improve yield and reliability, and provide clear technical insight to engineering teams and manufacturing partners. This is a highly hands-on individual contributor role for someone who enjoys working directly with data, investigating complex technical problems and turning analysis into actionable engineering conclusions. Skills and Experience Demonstrable experience within the semiconductor industry in Product Engineering, Test Engineering, Yield Engineering, Data Analytics or Quality Engineering, ideally spanning NPI through to high-volume production Strong experience analysing semiconductor manufacturing and test data to identify trends, correlations, excursions, yield loss mechanisms and opportunities for improvement Solid experience in as many of the following areas as possible: Wafer fab: analysis of Process Integration, Yield Enhancement, D0 Control, defect reduction and process variation data IC Assembly: Assembly Process or Package Design, 3D IC and wafer stacking, Assembly Quality Control, BOM optimisation and Yield Engineering Fabless Semiconductor: IC Product Qualification, reliability and failure analysis, RMA investigation and production monitoring Strong knowledge of WAT, WS/CP and FT datasets, including correlation across manufacturing and test stages Excellent data mining, statistical analysis and root-cause investigation skills, with the ability to turn complex datasets into clear engineering conclusions Experience identifying yield signatures, parameter distributions, outliers, spatial patterns, lot-to-lot variation and systematic versus random failure mechanisms Extensive hands-on use of semiconductor industry data analysis tools and software such as yieldHUB, Spotfire, JMP or equivalent Ability to create scripts, automated analyses, dashboards and repeatable analytical workflows for standard engineering investigations and reporting Experience applying statistical methods to semiconductor manufacturing data, including SPC, Cp/Cpk, distributions, correlation analysis, hypothesis testing and trend analysis Ability to combine data from multiple sources and manufacturing stages to investigate complex product and process issues Familiarity with FMEA-derived semiconductor qualification plans and relevant standards such as JEDEC Understanding of semiconductor failure analysis methods and the ability to use analytical data to guide selection of destructive and non-destructive investigation techniques Strong ability to communicate analytical findings through concise visualisations, reports and technical presentations Comfortable working independently on ambiguous technical problems and driving investigations from initial data exploration through to a supported conclusion Good communication skills and a collaborative, team-player attitude Self-starter, flexible and able to manage multiple analyses and investigations in parallel Willing and able to travel worldwide when needed Desirable Experience building automated semiconductor yield-monitoring, reporting or anomaly-detection workflows Experience working with large semiconductor datasets using SQL, Python or similar data-analysis tools Experience developing dashboards, standard analytical journals or reusable engineering analysis frameworks Multi-cultural awareness, including experience working with Far East suppliers and manufacturing partners A Bachelor's degree or above in Electronics, Microelectronics, Semiconductor Physics, Engineering or a similar discipline What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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Talent Pool Application
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteMid
dentalmanufacturinginsurancecompliancecompliance

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. We're growing fast, and we don't post everything. Over the next year we're hiring across silicon, hardware test, manufacturing operations, device software, compilers, performance simulation and the teams that keep all of it running. Some of those roles are live on this page. Plenty aren't yet. If you've read what we're building and want to work on it, send us your details. Tell us which area interests you and what you've worked on that's relevant. We'll come back to you when something fits. This isn't a formality. We read these, and several of our team joined this way. What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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Semiconductor Test Engineering Team Leader
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteLead$93,000 - $93,000 / Year
dentalmanufacturingquality controlarchitectureinsurancecompliance+2

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. The Role We are seeking a senior Semiconductor Test Engineering leader to drive manufacturing test strategy and silicon production readiness for next-generation AI accelerator devices. This role combines deep technical expertise in high-performance compute silicon with leadership responsibility for internal product engineering teams and external development partners. The successful candidate will oversee all aspects of production test development — from DFT strategy and ATE bring-up through silicon characterisation, yield optimisation, advanced packaging test, and high-volume manufacturing ramp — ensuring robust, scalable, and cost-effective test solutions for advanced AI accelerator platforms. Key Responsibilities Drive the manufacturing test strategy for an AI accelerator chip featuring PCIe Gen6, LPDDR, advanced CMOS nodes, and advanced packaging (e.g., 2.5D/3D, chiplet). Lead and manage a team of chip test engineers responsible for test planning, test program development, pattern bring-up, silicon characterization, debug, and optimization. Manage subcontracted test development partners (OSATs, ATE vendors, external engineering services). Includes scoping, technical oversight, schedule tracking, and quality control of deliverables. Define and drive test software architecture, DFT usage, and test pattern development strategies for high-speed logic, SRAM, DRAM, and High Speed IO blocks. Work closely with design, DFT, product engineering, packaging, and validation teams to ensure robust test coverage, manufacturability, and yield ramp success. Oversee test development for high speed interfaces such as PCIe Gen6 and multi-GHz LPDDR. Guide development of structural and functional test content (scan, MBIST, JTAG, HSIO tests, system-level tests). Lead silicon bring-up and development on ATE: correlation, failure analysis, shmooing, corner testing, stress testing, and yield improvement activities. Define KPIs and metrics for subcontractor performance, test coverage, yield, time-to-test, and cost optimization. Drive continuous improvement in test methodologies, automation, data analytics, and debug infrastructure. Ensure robust test flows for advanced packaging (thermals, interposer/bridge connections, TSV integrity, die-to-die IO testing). Support qualification, reliability testing, and high-volume manufacturing transfer. Required Qualifications 8+ years in semiconductor test engineering, including leadership or technical lead roles. Deep experience with ATE test development (e.g., Advantest 93K, Teradyne). Strong understanding of DFT (scan, ATPG, LBIST, MBIST), memory testing, and high-speed interface testing. Experience managing external test development partners or OSATs. Proven ability to lead and mentor test engineering teams. Solid background in advanced CMOS nodes and familiarity with advanced packaging test challenges. Expertise in silicon debug, characterization, and correlation across ATE and system-level environments. Ability to collaborate across design, architecture, product engineering, packaging, and operations.. Preferred Qualifications Experience with AI/ML accelerator chips or other high-performance compute ICs. Prior involvement with PCIe Gen5/Gen6 or LPDDR4/5/6 test methodologies. Familiarity with signal-integrity-aware test development and high-speed IO margining. Experience with chiplets, 2.5D/3D IC test flows, or heterogeneous integration. How we work Ownership and execution: you will have full agency to drive your work forward Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped, no matter who's it is What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find more English Speaking Jobs in United Kingdom on Arbeitnow

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Senior ML Compiler Engineer
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteSenior
machine learningdentalarchitectureinsurancecompliancecompliance+1

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. The Role We are looking for Senior ML Compiler Engineers with experience in machine learning compilation to work on the compiler stack for our ground-breaking AI accelerators. You can be based in our Bristol office or London. Fractile isn't another AI startup gluing together frameworks. We are designing a full-stack execution engine: hardware, compiler, runtime, to build the world's largest language models 100 x faster than today's systems. That ambition forces us to rethink everything from first principles. For compiler engineers, this is a rare moment: the architecture is still being shaped. The IR, the lowering strategy, the optimisation passes, the execution model - you get to define its future. In this role, you will: Develop the machine learning compiler stack for Fractile's innovative AI acceleration hardware Enable industry-leading performance of the latest LLMs on Fractile's accelerators Work with hardware, driver runtime, and ML engineers in a highly collaborative hardware-software co-design methodology It would be great if you have: Proven experience of the development of machine learning compilers using industry standard technologies such as MLIR or TVM Up-to-date knowledge of machine learning techniques and technologies A good understanding of computer architecture and performance optimisation techniques Excellent C/C++ skills and solid experience of industry standard development tools and technologies An creative and innovative mindset, and a willingness to take ownership and drive results in a fast-paced environment Computer Science, Electronic Engineering, Maths, Physics, or related degree and 4+ years of industry experience You may also have: Previous experience in a startup or small team environment What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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Member of Technical Staff - Security Engineering
Full TimeOn-sitePrincipal
rustllmrestlinuxdentalconcrete+6

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. The role We build the control chain that powers on, monitors, updates, and protects devices and racks across bare metal, RTOS, and embedded Linux. We also build the communication mechanisms that connect devices to each other and to the host. Security runs through all of it. A chain of trust from the hardware up to the rack management plane: the root of trust each controller boots from, the signed updates that reach the fleet safely, the identity that lets a device prove what it is, the authenticated channels the controllers and devices talk over, and the runtime protections that keep the host Linux kernel and the on-die firmware trustworthy long after boot. These are the layers that let operators rely on the hardware. You'd be deeply involved in that security across the chain, making it real in software. You'll work hand in hand with our architecture and hardware teams, bringing the software and system-level view: turning threat models into concrete mechanisms in bare metal, RTOS, and Linux, then designing, prototyping, and validating them. Some of the calls in this model are still open, and you'll help shape them. We want engineers who understand security from the inside out. You know how the root of trust, boot chain, key hierarchy, and secure interconnects actually work under the hood, not just how to switch them on. In this role, the security of your software solutions depends entirely on how well you understand the hardware beneath it. Some of the protections we rely on live in silicon, some in software, and part of the skill is knowing which belongs where. We're looking for people who know both sides well enough to build the mechanisms that close whole classes of bugs by design. We're not heavy on levels here! Whether you'd call yourself senior, staff, principal, or lead, what matters is depth of security judgement, system-level experience, and working well with the engineers around you. If you've worked deep in the security of real systems and like to get your hands on the code and the systems around it, we'd like to hear from you. What you'll do: Shape the security of the control chain (device, board, chassis, and rack controllers): threat models, trust boundaries, and a coherent secure-by-design approach across all platforms Design and help build secure boot and the root of trust on each controller: verified/measured boot, signing and verification, anti-rollback, and locking down debug and privileged access in production Secure the interconnects, between controllers and between devices and the host, with authentication, integrity, and additional protections where needed Design and build the cryptographic mechanisms: key hierarchies, provisioning and storage, device identity, and remote attestation so the fleet can prove what it's running Make firmware updates safe end to end: signed images, rollback protection, staged rollout, and clean recovery, across every hop of the chain Protect the running system, not just boot: harden the host Linux kernel and the on-die firmware Work closely with hardware and the rest of the software team to build security into the product, running threat-model reviews, triaging vulnerabilities, and driving fixes to closure What we're looking for: We expect you to know the fundamentals, and to have real, practical experience across several of these: An adversarial mindset and sharp threat-modeling instincts: trust boundaries, assets, attacks, and honesty about residual risk Hands-on experience with the core security primitives in software and in silicon: secure boot, root of trust, cryptography, and key management, including how they're implemented and where they can fail Secure protocol and channel design between components Strong C and Rust, and the instinct for memory safety and defensive coding that low-level security work needs Experience building, not just using, security mechanisms: a secure-boot chain, key hierarchy, or attestation flow you shaped That's the core. We get especially curious about your application when you also bring some of the following. Very few candidates tick every box here, and we don't expect you to: Attestation at boot and at runtime, and management-plane protocols (DICE, IETF RATS, SPDM, MCTP, PLDM; confidential-computing directions like TDISP) Hardware building blocks and firmware/Linux hardening (HSM, TPM, secure element, Caliptra, secure debug; open firmware/boot projects, image minimisation) Assurance and resistance (supply-chain security with SBOM and SLSA, fuzzing and testing, standards like NIST 800-series, Common Criteria, OCP incl. S.A.F.E., TCG/DMTF; physical and side-channel awareness) AI/LLM-assisted security tooling, and RISC-V / GPU / ML-accelerator experience What you're signing up for: This is a young company doing hard things, balanced across hardware and software. We're building the software layer for a whole inference system as it takes shape, so you'll often be securing systems ahead of the hardware: reasoning about a threat model against a specification first, then a simulator, then early boards. You'll work with incomplete information and watch it get sharper with every iteration. That takes comfort with ambiguity and a bias for action. If that sounds daunting, this may not be the role. If it sounds like the fun part, we should talk. Boundaries between areas are soft here. Security touches every layer, so you'll work across bare metal, RTOS, and Linux, and alongside the architecture and hardware teams as much as the rest of the software team. That breadth is a good part of the job. You'll be there for first bring-up, the first secure boot that verifies, the first device that attests itself, the first clean end-to-end run. A piece of what you built will live in silicon and in every rack we ship. We want a team that reflects the world it's built for, and we welcome applicants from every background, including those whose path here hasn't been a straight line. We care that you're excited by this kind of work, that you bring security rigour, and that you make a team better. What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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Senior Systems Software Engineer, GPU Compute
Full TimeFully RemoteSenior$170,000 - $300,000 / Year
pythongorkubernetesdeep learningtensorflow+4

About Nebius: Nebius is leading a new era in cloud infrastructure for the global AI economy. We are building a full-stack AI cloud platform that supports developers and enterprises from data and model training through to production deployment, without the cost and complexity of building large in-house AI/ML infrastructure. Built by engineers, for engineers. From large-scale GPU orchestration to inference optimization, we own the hard problems across compute, storage, networking and applied AI. Listed on Nasdaq (NBIS) and headquartered in Amsterdam, we have a global footprint with R&D hubs across Europe, the UK, North America and Israel. Our team of 1,500+ includes hundreds of engineers with deep expertise across hardware, software and AI R&D. The role We're looking for a Senior Software Systems Engineer to join our team and play a key role in the development of our cutting-edge hyperscaler platform. The GPU & InfiniBand team is responsible for enhancing and optimizing the core components of our Cloud platform, with a specific focus on GPU computing, InfiniBand networks, and the KVM/QEMU stack. You'll work closely with hardware virtualization and device emulation technologies, ensuring high performance and security in multi-GPU, HPC environments. The role involves analyzing, troubleshooting, and improving infrastructure to support new hardware, fine-tuning system performance, and automating fault detection and resolution in a complex system. In this position, you will be responsible for: Tuning the performance of GPU clusters and InfiniBand networks to ensure optimal operation in HPC and GPU-based environments. Analyzing and troubleshooting the root cause of issues related to GPUs and InfiniBand networks, and proposing corrective actions. Integrating new hardware into the existing infrastructure, including support for new GPU hardware through software stacks like Kubernetes, QEMU, and KVM. Enhancing automation systems for proactive monitoring, detecting, and resolving issues in GPU and InfiniBand environments. Configuring and managing GPU devices and InfiniBand fabrics, ensuring efficient and reliable operation. We expect you to have: 5+ years of professional experience in system-level software development (focused on performance optimization, low-level programming). 3+ years of hands-on experience with Linux systems (administration, troubleshooting, and performance tuning). In-depth understanding of server architecture, including PCIe devices, NICs, Linux OS/Kernel, and high-performance computing (HPC) systems. Strong proficiency in one or more performance-oriented programming languages (C/C++, Go, Python). It would be a plus if you have: Experience with GPU end-to-end testing in a cluster environment using InfiniBand networking. Proven track record of analyzing and optimizing the performance of HPC workloads (e.g., simulations, data analysis, AI/ML workloads). Familiarity with RDMA, RoCE, and InfiniBand protocols for high-performance communication. Background in Software-Defined Networking (SDN) and experience with HPC cluster networking . Understanding of QEMU/KVM virtualization and managing virtualized environments. Experience with deep learning frameworks such as PyTorch and TensorFlow , and their integration with HPC systems. Familiarity with collective communication libraries like MPI and NCCL for distributed computing. We offer competitive salaries ranging from $170k-$300k + equity based on your experience. We conduct coding interviews as part of the process. #LI-LH2 Benefits & Perks: Competitive compensation Career growth and learning opportunities Flexibility and ownership Collaborative and innovative culture Opportunity to work on impactful AI projects International environment and talented teams What's it like to work at Nebius: Fast moving - Bold thinking - Constant growth - Meaningful impact - Trust and real ownership - Opportunity to shape the future of AI Equal Opportunity Statement: Nebius is an equal opportunity employer. We are committed to fostering an inclusive and diverse workplace and to providing equal employment opportunities in all aspects of employment. We do not discriminate on the basis of race, color, religion, sex (including pregnancy), national origin, ancestry, age, disability, genetic information, marital status, veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by applicable law. Applicants must be authorized to work in the country in which they apply and will be required to provide proof of employment eligibility as a condition of hire. If you need accommodations during the application process, please let us know. Find Jobs in Germany on Arbeitnow

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Engineering Manager - Compilers
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteLead
machine learningllmdentalarchitectureinsurancecompliance+1

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. The role Fractile is building a full-stack AI accelerator from the ground up, and the compiler team sits at the heart of how we deliver performance. As the Engineering Manager for Compilers, you will build and lead a team of 10+ engineers developing the compiler stack for our novel AI acceleration hardware, with direct responsibility for enabling industry-leading LLM inference performance on Fractile's accelerators. This is a hands-on technical leadership role in a fast-moving, collaborative environment where the compiler team works closely with hardware, driver, runtime and ML engineers across the stack. If you want to shape the architecture of a compiler from first principles, build a world-class team around it, and have your work directly determine the performance of next-generation AI hardware, this is the role. What we're looking for: Proven track record of leadership experience managing a high-performance development team and delivering consistently outstanding outcomes. Proven experience in compiler development, with experience of machine learning compilers and industry standard technologies such as MLIR or TVM being a significant advantage. Up-to-date knowledge of machine learning techniques and technologies A good understanding of computer architecture and performance optimisation techniques. Excellent C/C++ skills and solid experience of industry standard development tools and technologies. A creative and innovative mindset, and a willingness to take ownership and drive results in a fast-paced environment. What you're signing up for: This is a young company doing hard things, at the intersection of novel silicon and the software stack that makes it useful. You'll be building and leading a compiler team as the hardware it targets is still taking shape, which means making architectural decisions against a specification first, then a simulator, then early silicon. The IR design, the lowering strategy, the execution model: you'll help define all of it before you can run it on real hardware. That takes comfort with ambiguity and the ability to make good calls with incomplete information. If that sounds frustrating, this probably isn't the role. If that sounds like the interesting part, we should talk. The boundaries here are soft by design. The compiler team works closely with hardware architects, kernel engineers, runtime teams and ML researchers. You'll need to understand enough of what sits above and below your layer to make good decisions at the boundary, and to build a team that can do the same. That breadth is a feature of the job, not a distraction from it. You'll be there when the first model runs end to end on Fractile silicon. When the lowering strategy you helped design produces a result the hardware team didn't think was possible yet. When the team you hired and grew ships something that goes into every rack we sell. We want a team that reflects the world it's building for, and we welcome applicants from every background, including those whose path here hasn't been straight. We care that you're energised by this kind of work, that you build and develop great engineers, and that you make the people around you better. Come build it with us. What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. 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Senior Linux Kernel Driver Engineer
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteSenior
rustlinuxdentalarchitectureinsurancecompliance+2

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. The Role This role sits at the boundary between host and silicon. The kernel driver is key to keeping pace with our ultra-fast devices on cutting-edge server platforms. It's a high-leverage layer where each win shows up as real throughput and latency gains. You'll be there for the pre-silicon simulations, first bring-up, first end-to-end runs, and the moments where performance jumps because of something you shipped. What you'll do Design, develop, and maintain the Linux kernel driver for Fractile's AI accelerator Build the performance-critical kernel-space paths that keep the host stack moving: PCIe device management, DMA, memory handling, interrupt handling, and robust recovery paths Define and evolve the userspace interface the runtime depends on, with a focus on stability, debuggability, and performance Work in a tight co-design loop with hardware, firmware, runtime and ML engineers: validate assumptions, iterate on behaviour, and close gaps early Improve tooling/workflows so we move fast without breaking things What we're looking for You've shipped and maintained Linux kernel device drivers in production. Experience with PCIe-attached devices and custom hardware interfaces is ideal. Strong systems and performance instincts. You can reason about computer architecture, concurrency, and where the time goes Excellent C and/or Rust, and a pragmatic approach to building high-quality, maintainable & secure kernel code You enjoy hard kernel and system-level problems, and you take them end-to-end until the measurements move Computer Science, Electronic Engineering, Maths, Physics, or related degree and 3+ years of industry experience Nice to have GPUs / ML accelerators / high‑throughput I/O (NICs, RDMA, storage) Hardware bring‑up or pre‑silicon simulation experience Performance work: profiling, tracing, benchmarking, regression tracking If you want to build the software where every driver win unlocks huge system performance, come build it together. What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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Senior Systems Software Engineer
FractileLondon - JJ Mack, Germany11 days ago
Full TimeOn-siteSenior
rustlinuxdentalembedded systemsrtosinsurance+3

About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. The Role We build the control chain that powers on, monitors, updates, and protects devices and racks across bare metal, RTOS, and embedded Linux. It's production-critical software that keeps racks stable, updates safe, and hardware secure. It's a critical layer in turning a tokens per second benchmark into a tokens per month system, turning great silicon into reliable output at rack scale. You'll be there for the first racks coming to life and rollout days where update safety matters. Your work makes the difference between a bad failure and a clean recovery path. This is the work that makes the system something operators can trust. What you'll do Develop firmware and services for management controllers at every level: rack management, BMC, and board/device controllers (RTOS and bare metal) Build systems software for board and rack management, from early bring-up through to production deployment Implement the critical flows that keep fleets healthy: power-on and provisioning, monitoring/telemetry, updates, recovery, and security Integrate with the wider host/device stack (drivers and runtime libraries) so the system works end-to-end Work closely with hardware and device software teams to define reliable interfaces, validate behaviour, and debug boundary issues What we're looking for Proven experience shipping production-critical, reliable embedded systems across two or more of: bare metal, RTOS, embedded Linux (or deep expertise in one with clear ability to ramp the others) Strong C and/or Rust, and excellent engineering judgement around safety, testing, debugging, and failure modes A reliability-first mindset: you design for observability, diagnosability, and recovery paths that are predictable and testable Comfortable working close to the hardware/software boundary (bootloaders/BSP/kernel-adjacent work) and collaborating tightly with HW, driver, and runtime teams Collaborative and high-ownership. You communicate clearly, move fast, and enjoy working through hard problems with others Computer Science, Electronic Engineering, Maths, Physics, or related degree and 3+ years of industry experience Nice to have Embedded platform / systems firmware experience (board management, BMC-style stacks, rack controllers) OpenBMC experience and/or embedded Linux image build/customisation experience Zephyr (or similar RTOS) experience Security-minded, with practical instincts around secure boot, signed updates, device identity, and designing systems that fail safe and recover cleanly (direct experience in some areas is a plus) Kernel device work (drivers, device tree, bring-up, perf/trace) Hardware bring-up experience, including lab tools (logic analysers, oscilloscopes, waveform viewers) RISC-V familiarity Experience with GPUs or ML accelerators If you want to build the control software that keeps rack-scale systems stable, safe, and secure for next-gen AI, come build it together. What We Offer Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role. Equity & Ownership: meaningful equity so everyone shares in the value creation Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance. Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment. Fractile is seeking to increase the clock speed of global progress, one chip at a time. We've recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us! Export controls Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process. Find Jobs in United Kingdom on Arbeitnow

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